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System-on-Chip Technologies

Course 0000001484 in WS 2017/8

General Data

Course Type lecture with integrated exercises
Semester Weekly Hours 3 SWS
Organisational Unit Chair of Integrated Systems (Prof. Herkersdorf)
Lecturers
Dates Wed, 13:15–14:45, 1100
Thu, 09:45–10:30, 1260
and 1 singular or moved dates

Assignment to Modules

Further Information

Courses are together with exams the building blocks for modules. Please keep in mind that information on the contents, learning outcomes and, especially examination conditions are given on the module level only – see section "Assignment to Modules" above.

additional remarks This course provides basics, current trends and challenges in the development of digital system-on-chip (SoC). We start with the main steps for building arbitrary CMOS-based combinatorial logic and sequential digital data processing and control circuitry (e.g. Finite State Machines) and explaining their role and significance in the scope of key system-on-chip components: microprocessors, memories and interconnects. The microarchitectural structure and building blocks of processor elements (RISC cores), on-/off-chip memory technology (SRAM, DRAM, Flash), bus and point-to-point interconnect standards (Processor Local Bus, Advanced Microcontroller Bus Architecture, FIFO) as well as the design of communications specific arithmetic blocks (adder, multipliers, shift and comparators) will be introduced and analyzed. Finally, we will introduce main implementation methods for SoCs, such as FPGA, standard cell and full custom design, and discuss methods for low power design, which is vital for the development of SoCs in embedded systems.
Links E-Learning course (e. g. Moodle)
TUMonline entry

Equivalent Courses (e. g. in other semesters)

SemesterTitleLecturersDates
WS 2023/4 System-on-Chip Technologies Biersack, F. Herkersdorf, A. Stechele, W. Wild, T.
Responsible/Coordination: Surhonne, A. 		Thu, 09:45–10:30, 0220
Thu, 15:00–16:30, 0220
and singular or moved dates
WS 2022/3 System-on-Chip Technologies Biersack, F. Herkersdorf, A. Stechele, W. Wild, T.
Responsible/Coordination: Surhonne, A. 		Thu, 15:00–16:30, 0220
Thu, 09:45–10:30, 1260
and singular or moved dates
WS 2021/2 System-on-Chip Technologies Biersack, F. Herkersdorf, A. Stechele, W.
Responsible/Coordination: Surhonne, A. 		Wed, 13:15–14:45, 0.001
Thu, 09:45–10:30, 1260
and singular or moved dates
WS 2020/1 System-on-Chip Technologies Biersack, F. Herkersdorf, A. Sagi, M. Stechele, W.
Responsible/Coordination: Surhonne, A. 		Wed, 13:15–14:45, virtuell
Thu, 09:45–10:30, virtuell
WS 2019/20 System-on-Chip Technologies Herkersdorf, A. Sagi, M. Stechele, W.
Responsible/Coordination: Surhonne, A. 		Wed, 13:15–14:45, 0360
Thu, 09:45–10:30, 1260
WS 2018/9 System-on-Chip Technologies Herkersdorf, A. Sagi, M. Stechele, W. Wed, 13:15–14:45, 0360
Thu, 09:45–10:30, 1260
WS 2016/7 System-on-Chip Technologies
WS 2015/6 System-on-Chip Technologies
WS 2014/5 System-on-Chip Technologies
WS 2013/4 System-on-Chip Technologies
WS 2012/3 System-on-Chip Technologies
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