FPGA based detector signal processing
Module PH2101
Module version of WS 2021/2 (current)
There are historic module descriptions of this module. A module description is valid until replaced by a newer one.
Whether the module’s courses are offered during a specific semester is listed in the section Courses, Learning and Teaching Methods and Literature below.
available module versions | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|
WS 2021/2 | SS 2021 | WS 2020/1 | SS 2020 | WS 2019/20 | SS 2019 | WS 2018/9 | SS 2018 | WS 2017/8 | WS 2015/6 | SS 2011 |
Basic Information
PH2101 is a semester module in English language at Master’s level which is offered every semester.
This Module is included in the following catalogues within the study programs in physics.
- Specific catalogue of special courses for nuclear, particle, and astrophysics
- Specific catalogue of special courses for Applied and Engineering Physics
- Focus Area Bio-Sensors in M.Sc. Biomedical Engineering and Medical Physics
- Complementary catalogue of special courses for condensed matter physics
- Complementary catalogue of special courses for Biophysics
If not stated otherwise for export to a non-physics program the student workload is given in the following table.
Total workload | Contact hours | Credits (ECTS) |
---|---|---|
150 h | 60 h | 5 CP |
Responsible coordinator of the module PH2101 is Stephan Paul.
Content, Learning Outcome and Preconditions
Content
Detector data acquisition and online signal processing with programmable logic / field programmable gate arrays (FPGAs).
- Introduction to the FPGA design process (modeling, simulation, synthesis, Xilinx design tools)
- Introduction to the VHDL hardware description language (modularity, concurrent/sequential statements, synchronous/asynchronous logic)
- Electronic design with VHDL and FPGAs (pipelined data processing, data flow control, counters, state machines)
- Signal processing basics (signal sampling, FFT, digital filters)
- Detector readout concepts (analog pipeline ASICs, sampling ADCs)
- Debug and measurement equipment (oscilloscope, logic analyzer)
- Design of a data acquisition system based on Xilinx FPGAs for a particle detector. (frontend ASIC configuration and readout, signal baseline correction, trigger decision, amplitude detection, ...)
Learning Outcome
After successful completion of the module the students are able to
- understand how FPGAs are built up
- create FPGA projects
- code in VHDL
Preconditions
No preconditions in addition to the requirements for the Master’s program in Physics.
Courses, Learning and Teaching Methods and Literature
Courses and Schedule
Type | SWS | Title | Lecturer(s) | Dates | Links |
---|---|---|---|---|---|
VO | 2 | FPGA Based Detector Signal Processing |
Paul, S.
Assistants: Ecker, D.Huber, S. |
Thu, 14:00–16:00, PH 3268 |
eLearning |
UE | 2 | Exercise to FPGA Based Detector Signal Processing |
Ecker, D.
Huber, S.
Responsible/Coordination: Paul, S. |
dates in groups |
eLearning |
Learning and Teaching Methods
The module is divided into a lecture part and a laboratory course (exercise). The basic theory is covered by the lecture which can be applied immediately to the design software in the laboratory part. The different tasks for the final data acquisition project are shared between the students. The Xilinx FPGA design software is also available for installation on student laptops.
Media
Blackboard, exercises and examples, lecture notes
Literature
- P.A. Simpson: FPGA Design, Spinger, (2010)
- P. J. Ashenden: The Student’s Guide to VHDL, Morgan Kaufmann, (2008)
- P. J. Ashenden: The Designer’s Guide to VHDL, Morgan Kaufmann, (2008)
- W.R. Leo: Techniques for Nuclear and Particle Physics experiments, Springer, (1994)
Module Exam
Description of exams and course work
There will be an oral exam of 25 minutes duration. Therein the achievement of the competencies given in section learning outcome is tested exemplarily at least to the given cognition level using comprehension questions and sample calculations.
For example an assignment in the exam might be:
- What is an FPGA?
- Waht components are inside an FPGA?
- What is CDC?
In the exam no learning aids are permitted.
There will be a bonus (one intermediate stepping of "0,3" to the better grade) on passed module exams (4,3 is not upgraded to 4,0). The bonus is applicable to the exam period directly following the lecture period (not to the exam repetition) and subject to the condition that the student passes the mid-term of accomplishing a laboratory assignment.
Exam Repetition
The exam may be repeated at the end of the semester. There is a possibility to take the exam in the following semester.