FPGA based detector signal processing
This module handbook serves to describe contents, learning outcome, methods and examination type as well as linking to current dates for courses and module examination in the respective sections.
Module version of WS 2018/9
There are historic module descriptions of this module. A module description is valid until replaced by a newer one.
|available module versions|
|WS 2019/20||SS 2019||WS 2018/9||SS 2018||WS 2017/8||WS 2015/6||SS 2011|
PH2101 is a semester module in English language at Master’s level which is offered every semester.
This Module is included in the following catalogues within the study programs in physics.
- Specific catalogue of special courses for nuclear, particle, and astrophysics
- Specific catalogue of special courses for Applied and Engineering Physics
- Complementary catalogue of special courses for condensed matter physics
- Complementary catalogue of special courses for Biophysics
If not stated otherwise for export to a non-physics program the student workload is given in the following table.
|Total workload||Contact hours||Credits (ECTS)|
|150 h||75 h||5 CP|
Responsible coordinator of the module PH2101 in the version of WS 2018/9 was Stephan Paul.
Content, Learning Outcome and Preconditions
Detector data acquisition and online signal processing with programmable logic / field programmable gate arrays (FPGAs).
- Introduction to the FPGA design process (modeling, simulation, synthesis, Xilinx design tools)
- Introduction to the VHDL hardware description language (modularity, concurrent/sequential statements, synchronous/asynchronous logic)
- Electronic design with VHDL and FPGAs (pipelined data processing, data flow control, counters, state machines)
- Signal processing basics (signal sampling, FFT, digital filters)
- Detector readout concepts (analog pipeline ASICs, sampling ADCs)
- Debug and measurement equipment (oscilloscope, logic analyzer)
- Design of a data acquisition system based on Xilinx FPGAs for a particle detector. (frontend ASIC configuration and readout, signal baseline correction, trigger decision, amplitude detection, ...)
After successful completion of the module the students are able to
- Understand how FPGAs are built up.
- Know how to create FPGA projects.
- Know how to code in VHDL.
No special requirements
Courses, Learning and Teaching Methods and Literature
Courses and Schedule
|VO||2||FPGA Based Detector Signal Processing||
Assistants: Huber, S.
Thu, 14:00–16:00, PH 3268
|UE||2||Exercise to FPGA Based Detector Signal Processing||
Responsible/Coordination: Paul, S.
Thu, 16:00–18:00, PH 3268
Learning and Teaching Methods
The course is divided into a lecture part and an applied laboratory part (exercise). The basic theory is covered by the lecture which can be applied immediately to the design software in the laboratory part. The different tasks for the final data acquisition project are shared between the students and can be implemented besides the course. The Xilinx FPGA design software is also available for installation on student laptops.
exercises and examples
P.A. Simpson “FPGA Design” (eBook available)
P. J. Ashenden “The Student’s Guide to VHDL” (eBook available)
P. J. Ashenden “The Designer’s Guide to VHDL” (eBook available)
W.R. Leo “Techniques for Nuclear and Particle Physics experiments” (eBook available)
Description of exams and course work
There will be an oral exam of 25 minutes duration. Therein the achievement of the competencies given in section learning outcome is tested exemplarily at least to the given cognition level using comprehension questions and sample calculations.
For example an assignment in the exam might be:
- What is an FPGA?
- Waht components are inside an FPGA?
- What is CDC?
In the exam no learning aids are permitted.
There will be a bonus (one intermediate stepping of "0,3" to the better grade) on passed module exams (4,3 is not upgraded to 4,0). The bonus is applicable to the exam period directly following the lecture period (not to the exam repetition) and subject to the condition that the student passes the mid-term of passing the lab course
The exam may be repeated at the end of the semester. There is a possibility to take the exam in the following semester.
Current exam dates
Currently TUMonline lists the following exam dates. In addition to the general information above please refer to the current information given during the course.
|Exam in FPGA based detector signal processing|
|Mon, 2020-02-03||Dummy-Termin. Wenden Sie sich zur individuellen Terminvereinbarung an die/den Prüfer(in). Anmeldung für Prüfungstermin vor Mo, 23.03.2020. // Dummy date. Contact examiner for individual appointment. Registration for exam date before Mon, 2020-03-23.||till 2020-01-15 (cancelation of registration till 2020-02-02)|
|Tue, 2020-03-24||Dummy-Termin. Wenden Sie sich zur individuellen Terminvereinbarung an die/den Prüfer(in). Anmeldung für Prüfungstermin zwischen Di, 24.03.2020 und Sa, 18.04.2020. // Dummy date. Contact examiner for individual appointment. Registration for exam date between Tue, 2020-03-24 and Sat, 2020-04-18.||till 2020-03-23|