Digital IC-Design

Module EI5003

This Module is offered by TUM Department of Electrical and Computer Engineering.

This module handbook serves to describe contents, learning outcome, methods and examination type as well as linking to current dates for courses and module examination in the respective sections.

Basic Information

EI5003 is a semester module in English language at Master’s level which is offered in winter semester.

This module description is valid to SS 2012.

Total workloadContact hoursCredits (ECTS)
90 h 45 h 3 CP

Content, Learning Outcome and Preconditions

Content

Moore`s law: Projection of IC technology scaling and its technical/economical implications From MOSFET transistors to the realization of combinatorial/sequential logic, Finite State Machines (FSM), SRAM, DRAM, Flash, FPGA IC design platforms: FPGA, standard cell, full custom design, SoC (System-on-Chip) Timing, power, area estimation and optimization, clock distribution Packaging and I/O technology

Learning Outcome

The objective of this course is to impart a basic understanding of digital IC design on the architectural, logic and circuit levels. Basic building blocks of digital circuits, e.g. logic gates, registers, adders, multipliers and memories are introduced. Techniques for circuit timing, area and power consumption and optimization are addressed.

Preconditions

Binary number systems, Kirchhoff's Laws, High School Mathematics, Semiconductor Basics

Courses, Learning and Teaching Methods and Literature

Learning and Teaching Methods

Learning method: In addition to the individual methods of the students consolidated knowledge is aspired by repeated lessons in exercises and tutorials. Teaching method: During the lectures students are instructed in a teacher-centered style. The exercises are held in a student-centered way.

Media

The following kinds of media are used: - Presentations - Lecture notes - Exercises with solutions as download

Literature

The following literature is recommended: - J. Hennessy "Comp. Architecture-A Quantit.Approach" - J. Rabaey, "Digital Integrated Circuits", Prentice Hall - N. Weste, K. Eshraghian, "Principles of CMOS VLSI Design", Addison Wesley

Module Exam

Description of exams and course work

Examination with the following elements: - Optional written midterm examination - Written final examination The midterm may be taken but not handed in. If it is handed in, it will count as 25% of the final grade. If not, the final will make up 100% of the final grade.

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